NGUYEN MANH HUNG; PHAN VAN VIET; PHAM MINH THANG; NGUYEN VAN KHOI. A design strategy for analyzing signal integrity in DDR3 bus of high speed embedded systems. Journal of Military Science and Technology, [S. l.], n. CAPITI, p. 75–81, 2024. DOI: 10.54939/1859-1043.j.mst.CAPITI.2024.75-81. Disponível em: https://ojs.jmst.info/index.php/jmst/article/view/1172. Acesso em: 19 sep. 2024.