PHAN HONG MINH; NGUYEN MANH CUONG; NGUYEN TRUONG SON. A 32×32 16-bit integer matrix multiplication hardware acceleration design and evaluation on 45nm PDK. Journal of Military Science and Technology, [S. l.], n. IITE, p. 45–53, 2025. DOI: 10.54939/1859-1043.j.mst.IITE.2025.45-53. Disponível em: https://ojs.jmst.info/index.php/jmst/article/view/1860. Acesso em: 31 oct. 2025.